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Journal of Engineering Sciences

Serial No : 20446
UGC CARE APPROVED GROUP 'II' MULTIDISCIPLINARY JOURNAL

Vol 10 Issue 7,2019

1

COMPARISON OF DVR AND D-STATCOM FOR VOLTAGE QUALITY IMPROVEMENT

MR.JADAPALLISREEDHAR, MRS. DABBETISURJANA , ANAMACHARYA INSTITUTE OF TECHNOLOGY AND SCIENCES, KADAPA

Page No :1-6

DOI:10.15433.JES.2019.V10I7.43P.01

2

MODULAR GRID-CONNECTED CASCADED H-BRIDGE MULTILEVEL PV INVERTER USING FUZZY PID CONTROLLER

C.SWATHI, K.HARI , Annamayya Institute Of Technology & Sciences

Page No :7-13

DOI:10.15433.JES.2019.V10.I7.43P.02

3

STUDY OF MECHANICAL PROPERTIES IN CONCRETE WITH PLASTIC WASTE AND DEMOLISHED AGGREGATE

SURYA KUMAR VADHYAVATH , SRI RAMAKRISHNA VADLAMUDI , KHADER MEMORIAL COLLEGE OF ENGINEERING & TECHNOLOGY, NALGONDA(DT).

Page No :14-18

DOI:10.15433.JES.2019.V10.I7.43P.03

4

ACCURATE REACTIVE POWER SHARING IN AN ISLANDED MICROGRID USING ADAPTIVE VIRTUAL IMPEDANCES

P ANKI REDDY, PRIYANKA , SASTRA Deemed University, Thanjavur

Page No :19-22

DOI:10.15433.JES.2019.Vol 10I7.43P.4

5

WIRELESS NETWORKS WITH ELASTIC AND INELASTIC TRAFFIC FOR CONTENT CACHING AND SCHEDULING

A.Santosh, Mr.P.CH.L. Bhargava , KITS, RAMACHANDRAPURAM

Page No :23-28

DOI:10.15433.JES.2019.Vol 10 I7.43P.05

6

A SURVEY ON SECURE DATA RETRIEVAL FOR DECENTRALIZED DISRUPTION TOLERANT MILITARY NETWORK

N.srinivasa Reddy, Mr.P.CH.L. Bhargava , KITS, RAMACHANDRAPURAM

Page No :29-34

DOI:10.15433.JES.2019.Vol 10 I7.43P.06

7

Simulation of PI and Fuzzy Controlled Active Power Filter for Power Quality Improvement

BAIRI VENKATESHWARLU ,P. SWETHA, A. SRAVANYA , LORDS INSTITUTE OF ENGINEERING& TECHNOLOGY, RR DT; Telangana, India.

Page No :35-41

DOI:10.15433.JES.2020.Vol 10 Issue 7.43P.7

8

DISTRIBUTED POWER FLOW CONTROLLER FOR ENHANCING POWER SYSTEM STABILITY

R VENKATA KRISHNA ,S MALLIKARJUNA, BAIRI VENKATESHWARLU , LORD’S Inst of Engg & Tech(M2). Himayathsagar, Hyderabad, JNTUH

Page No :226-232

DOI:10.15433.JES.2019.V10I7.43P.8

9

VLSI Design of Low Power Array Multiplier Using Modified Full Adder based on Verilog

NOOKALA SAIRAM , Vignana Bharathi Institute of Technology.

Page No :233-237

DOI:10.15433.JES.2019.V10I7.43P.9